Trusted Platform Module Basics

Chapter 1: History of the Trusted Computing Group Chapter 2: Cryptographic BasicsChapter 3: Software vs. Hardware Based Security Models Chapter 4: Hardware Design ConsiderationsChapter 5: TPM Architectural OverviewChapter 6: Root of Trust, the TPM Endorsement KeyChapter 7: Key Hierarchy and ManagementChapter 8: Platform Configuration RegistersChapter 9: TPM Command Message OverviewChapter 10: TPM Intra Message StructuresChapter 11: Anti-Replay Protection and Rolling Nonces Chapter 12: Command AuthorizationChapter 13: Communicating with the TPM, Intel’s Low Pin Count (LPC) BusChapter 14: TPM LPC Base Address Definitions and FunctionalityChapter 15: TPM Sacred Seven Command SuiteChapter 16: Compliance Vectors and Their PurposeChapter 17: TPM System Deployment Initialization Chapter 18: Establishing a TPM Owner and Owner Authorized Command SuiteChapter 19: TPM Cryptographic Command Suite Chapter 20: TPM PCR Command Suite Chapter 21: TPM Protection Profile Chapter 22: Trusted Device Driver Chapter 23: Trusted Device Driver Layer and Interface Chapter 24: Sequential Command Examples Chapter 25: Migrating to the 1.2 Version of the TPMAPPENDIX A: TPM Command List by OrdinalAPPENDIX B: TPM Error List by Return Code APPENDIX C: SMBus, An Alternate Communication ModelAPPENDIX D: Compliance Test Suite Source Code, C Source