Analog Design Issues in Digital VLSI Circuits and Systems

Circuit Analysis and Simulation. Selection of Voltage Thresholds for Delay Measurement; V. Chandramouli, K.A. Sakallah. Delay and Power Expressions for a CMOS Inverter Driving a Resistive-Capacitive Load; V. Adler, E.G. Friedman. Mixed Analog Digital Simulation of Integrated Circuits with BRASIL; U. Bretthauer, E.-H. Horneber. Ramp Input Response of RC Tree Networks; E.G. Friedman, J.H. Mulligan, Jr. Novel Circuit Design Techniques. A Wired-AND Current-Mode Logic Circuit Technique in CMOS for Low-Voltage, High-Speed and Mixed-Signal VLSIC; I.E. Ungan, M. Askar. Design and Evaluation of Adiabatic Arithmetic Units; M.C. Knapp, et al. Filter Design Using a New Field-Programmable Analog Array (FPAA); H. Kutuk, S. Kang. Robust Design. CMOS PLL Design in a Digital Chip Environment; D.A. Ramey. di/dt Noise in CMOS Integrated Circuits; P. Larsson. Latin Hypercube Sampling Monte Carlo Estimation of Average Quality Index for Integrated Circuits; M. Keramat, R. Kielbasa. Analysis of Metastable Operation in a CMOS Dynamic D-Latch; J. Juan- Chico, et al.