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Digitally Assisted Pipeline ADCs

Theory and Implementation

Paperback Engels 2010 9781441954435
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Digitally Assisted Pipeline ADCs: Theory and Implementation explores the opportunity to reduce ADC power dissipation by leveraging digital signal processing capabilities in fine line integrated circuit technology. The described digitally assisted pipelined ADC uses a statistics-based system identification technique as an enabling element to replace precision residue amplifiers with simple open-loop gain stages. The digital compensation of analog circuit distortion eliminates one key factor in the classical noise-speed-linearity constraint loop and thereby enables a significant power reduction.
Digitally Assisted Pipeline ADCs: Theory and Implementation describes in detail the implementation and measurement results of a 12-bit, 75-MSample/sec proof-of-concept prototype. The Experimental converter achieves power savings greater than 60% over conventional implementations.
Digitally Assisted Pipeline ADCs: Theory and Implementation will be of interest to researchers and professionals interested in advances of state-of-the-art in A/D conversion techniques.

Specificaties

ISBN13:9781441954435
Taal:Engels
Bindwijze:paperback
Aantal pagina's:155
Uitgever:Springer US

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Inhoudsopgave

<P>List of Figures. List of Tables. Acknowledgements. Preface. <STRONG>1: Introduction. 1.</STRONG> Motivation. <STRONG>2.</STRONG> Overview. <STRONG>3.</STRONG> Chapter Organization. <STRONG>2: Performance Trends. 1.</STRONG> Introduction. <STRONG>2.</STRONG> Digital Performance Trends. <STRONG>3.</STRONG> ADC Performance Trends. <STRONG>3: Scaling Analysis. 1.</STRONG> Introduction. <STRONG>2.</STRONG> Basic Device Scaling from a Digital Perspective. <STRONG>3.</STRONG> Technology Metrics for Analog Circuits. <STRONG>4.</STRONG> Scaling Impact on Matching-Limited Circuits. <STRONG>5.</STRONG> Scaling Impact on Noise-Limited Circuits. <STRONG>4: Improving Analog Circuit</STRONG> <STRONG>Efficiency. 1.</STRONG> Introduction. <STRONG>2.</STRONG> Analog Circuit Challenges. <STRONG>3.</STRONG> The Cost of Feedback. <STRONG>4.</STRONG> Two-Stage Feedback Amplifier vs. Open-Loop Gain Stage. <STRONG>5.</STRONG> Discussion. <STRONG>5: Open-Loop Pipelined ADCs. 1.</STRONG> A Brief Review of Pipelined ADCs. <STRONG>2.</STRONG> Conventional Stage Implementation. <STRONG>3.</STRONG> Open-Loop Pipeline Stages. <STRONG>4.</STRONG> Alternative Transconductor Implementations. <STRONG>6: Digital Nonlinearity Correction. 1.</STRONG> Overview. <STRONG>2.</STRONG> Error Model and Digital Correction. <STRONG>3.</STRONG> Alternative Error Models. <STRONG>7:</STRONG> <STRONG>Statistics-Based Parameter Estimation. 1.</STRONG> Introduction. <STRONG>2.</STRONG> Modulation Approach. <STRONG>3.</STRONG> Required Sub-ADC and Sub-DAC Redundancy. <STRONG>4.</STRONG> Parameter Estimation Based on Residue Differences. <STRONG>5.</STRONG> Statistics Based Difference Estimation. <STRONG>6.</STRONG> Complete Estimation Block. <STRONG>7.</STRONG> Simulation Example. <STRONG>8.</STRONG> Discussion. <STRONG>8: Prototype Implementation. 1.</STRONG> ADC Architecture. <STRONG>2.</STRONG> Stage 1. <STRONG>3.</STRONG> Stage 2. <STRONG>4.</STRONG> Post-Processor. <STRONG>9:</STRONG> <STRONG>Experimental Results. 1.</STRONG> Layout and Packaging. <STRONG>2.</STRONG> Test Setup. <STRONG>3.</STRONG> Measured Results. <STRONG>4.</STRONG> Post-Processor Complexity. <STRONG>10: Conclusion.</STRONG> <STRONG>1.</STRONG> Summary. <STRONG>2.</STRONG> Suggestions for Future Work. <STRONG>Appendices.</STRONG> <STRONG>A:</STRONG> Open-Loop Charge Redistribution. <STRONG>B:</STRONG> Estimator Variance. <STRONG>C:</STRONG> LMS Loop Analysis. <STRONG>1.</STRONG> Time Constant. <STRONG>2.</STRONG> Output Variance. <STRONG>3.</STRONG> Maximum Gain Parameters. References. Index. </P>

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