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Multi-Net Optimization of VLSI Interconnect

Gebonden Engels 2014 2015e druk 9781461408208
Verwachte levertijd ongeveer 9 werkdagen

Samenvatting

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.

Specificaties

ISBN13:9781461408208
Taal:Engels
Bindwijze:gebonden
Aantal pagina's:233
Uitgever:Springer New York
Druk:2015

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Inhoudsopgave

<p>An Overview of the VLSI Interconnect Problem.- Interconnect Aspects in Design Methodology and EDA Tools.- Scaling Dependent Electrical Modeling of Interconnects.- Net-by-Net Wire Optimization.- Multi-Net Sizing and Spacing of Bundle Wires.- Multi-net Sizing and Spacing in General Layouts.- Interconnect Optimization by Net Ordering.- Layout Migration.- Future Directions in Interconnect Optimization. </p><p>

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        Multi-Net Optimization of VLSI Interconnect