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Source-Synchronous Networks-On-Chip

Circuit and Architectural Interconnect Modeling

Gebonden Engels 2013 2014e druk 9781461494041
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Samenvatting

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

Specificaties

ISBN13:9781461494041
Taal:Engels
Bindwijze:gebonden
Aantal pagina's:143
Uitgever:Springer New York
Druk:2014

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Inhoudsopgave

Introduction.- Clock Distribution for fast Networks-on-Chip.- Fast Network-on-Chip Design.- Fast On-Chip Data transfer using Sinusoid Signals.- Conclusion and Future Work.

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€ 122,99
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        Source-Synchronous Networks-On-Chip