Sumit Ahuja,
Avinash Lakshminarayana,
Sandeep Kumar Shukla
Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Paperback Engels 2014 9781489987808Levertijd ongeveer 9 werkdagen
Gratis verzonden
Samenvatting
This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.
Specificaties
ISBN13:9781489987808
Taal:Engels
Bindwijze:paperback
Uitgever:Springer New York
Lezersrecensies
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Inhoudsopgave
Introduction.- Related Work.- Background.- Architectural Selection using High Level Synthesis.- Statistical Regression Based Power Models.- Coprocessor Design Space Exploration Using High Level Synthesis.- Regression-based Dynamic Power Estimation for FPGAs.- High Level Simulation Directed RTL Power Estimation.- Applying Verification Collaterals for Accurate Power Estimation.- Power Reduction using High-Level Clock-gating.- Model-Checking to exploit Sequential Clock-gating.- System Level Simulation Guided Approach for Clock-gating.- Conclusions.
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