Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

<p>Sleep-Transistor Based Power-Gating Tradeoff Analyses.- Modelling and Analysis of Manufacturing Variability Effects from Process to Architectural Level.- Non-invasive Power Simulation at System-Level with SystemC.- A Standard Cell Optimization Method for Near-Threshold Voltage Operations.- An Extended Metastability Simulation Method for Synchronizer Characterization.- Phase Space Based NBTI Model.- Fast Propagation of Hamming and Signal Distances for Register-Transfer Level Datapaths.- Noise Margin Based Library Optimization Considering Variability in Sub-threshold.- TCP Window Based DVFS for Low Power Network Controller SoC.- A Generic Architecture for Robust Asynchronous Communication Links.- Direct Statistical Simulation of Timing Properties in Sequential Circuits.- On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture.- Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications.- Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor.- Run-Time Measurement of Harvested Energy for Autarkic Sensor Operation.- Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines.- Dynamic Power Management of a Computer with Self Power-Managed Components.- Case Studies of Logical Computation on Stochastic Bit Streams.</p>